Decoupling is all about reducing noise in your circuits and its main
objective is to provide a low impedance path to short out high frequencies away
from your integrated circuits and back to the power supply.
To provide a low impedance at high frequency (but high impedance at DC so
filtered voltage/current is fed into the IC) a capacitor is used since its
...the higher the frequency (f) the lower that Xc (capacitive reactance) becomes i.e. at high frequency Xc is lower.
Note: At DC f=0 so Xc theorectically is infinite in a real device it can not be infinite due to current leakage.
You might think that placing electrolytic 10uF capacitors everywhere is a good idea since it will give the lowest Xc but large capacitors do not behave well at high frequencies. This is where the real world asserts itself and you have to choose components based on how they work in the real world not on the 'Ideal'.
Generally for each IC you should use a polyester 100nF or a 10nF for each power/ground connection to the IC and use a few 10uF or 100uF to provide low frequency decoupling elsewhere.
For general decoupling use an electrolytic 100uF or 10uF capacitor at the output of the power
supply e.g. from a 7805 (also add to the input of a 7805). Add more of these
for a large board (spread around the board).
Note In a PCB design its easier to leave capacitors off rather than add them later!
You have to ensure that you use decoupling
on all chips so place a 100nF capacitor as close to the power supply of
each device. In general you should place one 100nF for every device power
supply connection - some devices have two or more power supply connections.
To remove high frequency interference use a small capacitance in parallel
with each 100nF e.g. a ceramic 10nF
- not all capacitors are made the same so smaller ones have a better high
Note: You only really need this on critical sections/boards e.g. if interfacing to an RF system it would be a good idea.
Placing a series inductor in the power supply to each chip will also have a decoupling effect e.g. 100uH but ensure it can pass the maximum current the the device can supply.
This is easiest to do when creating a PCB but you can add insulated copper
foil to the back of a prototype. The ground plane reduces the inductance of
the ground return paths and for e=L( di/dt) reducing L reduces e i.e. the
induced noise voltage due to ground currents will be smaller - less noise.
Connect this ground planes at the negative power supply connection only so that digital noise is kept in the digital ground plane and analogue noise is kept in the analogue ground plane.
Keep digital and analogue ground places separate. Connect the two grounds at
the power supply ground so digital noise goes directly to the power supply
negative pin and the analogue ground does not see the digital noise.
Digital noise is generally very strong as the signals pass through nearly
the full supply voltage range and if driving current hungry devices, large
current flows back to the power supply through the ground return path.
If there are analogue devices with their ground connected in the path of this ground return path current) then the small resistance of the device ground pin and inductance of the chip package itself will react to the current - causing ground bounce
The ground reference of the analogue device will change depending on digital signals - and it looks like digital noise at the output of the analogue device.
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