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Direct Reading Inductance Meter

This project,a direct reading inductance meter from 1978, shows how to generate an output voltage directly proportional to the inductance being measured. 

Executive Summary of the Direct Reading Inductance Meter

A direct reading inductance meter applies linearly increasing ramp current pulses to a coil under test and compares the voltage developed across the coil during occurrence of the pulses with the voltage developed across the coil while a steady state current is applied to the coil thereby to provide an output voltage having a value directly related to the inductance of the coil.

Background of the Direct Reading Inductance Meter

The method which was heretofor most commonly used to measure the inductance of a coil made use of an impedance bridge wherein several impedance values were adjusted to provide a minimum or null reading on a highly sensitive meter. After balancing the meter the inductance value was then read from a dial associated with one of the adjustable impedances. While such a method is well suited for use in laboratories, it is too time consuming for field use in the servicing of electronic equipment. Moreover, the required bridge components are relatively bulky and expensive, and considerable skill is required to balance the bridge and read the inductance value from the dial.

By definition the inductance value of an inductor is:



It would be desirable to provide a method and circuit for utilizing this basic equation to provide a simple and direct measurement of the inductance of a coil.

Summary of the Direct Reading Inductance Meter

Briefly, in accordance with the broader aspects of the present design ramp pulses of linearly varying current are applied to a coil under test to develop a peak voltage across the coil during occurrence of the pulses, which peak voltage may be calculated using the following equation:



wherein:

L is the inductance value of the coil.

I.sub.max is the peak current through the coil during each pulse.

R.sub.L is the resistance of the coil.

di/dt is a constant throughout the duration of each pulse.

This peak voltage value, V.sub.p, is stored in a capacitor while a steady state current equal to I.sub.max is applied to the coil between the ramp pulses. Consequently, between ramp pulses the voltage developed across the coil is as follows:



It will be apparent that



Therefore, for a given constant value of di/dt



This difference or output voltage is applied to a voltmeter having its output calibrated directly in Henrys so that the meter automatically provides a direct reading of the inductance value of the coil under test.

In order to facilitate a reading of inductance, it is desirable to employ a meter having a digital readout, and in order to minimize the number of digit readout elements required, there is provided in accordance with another aspect of the design means for using different values of di/dt for different ranges of inductance value. In this manner a readout of the three most significant digits is provided for a wide overall range of inductance values. In a commercial embodiment of the design the overall range is from about 0.1 .mu.H to about 10 H.


Figure 1 : Is a block diagram of an inductance measuring circuit 
for the direct reading inductance meter
Is a block diagram of an inductance measuring circuit embodying the present design; <br>for the direct reading inductance meter



Description of the Direct Reading Inductance Meter

Referring to FIG. 1, a coil or other inductance device 10 whose inductance value is to be measured is connected in series with a spring biased, normally open switch S1 across a diode 14 having its positive terminal connected to ground. When the switch S1 is closed the inductance value of the coil 10 is shown by a digital display 15. In a preferred embodiment of the design the display has three digits and displays the three most significant digits of a wide range of inductance values.


Figure 2 : Is a plurality of wave forms useful in understanding the design
for the direct reading inductance meter
Is a plurality of wave forms useful in understanding the design; and <br>for the direct reading inductance meter



In accordance with the present design, a main control circuit 16 of any suitable construction produces a wave form of voltage A as shown in FIG. 2. The wave form A comprises a train of positive rectangular pulses each having a substantially square trailing edge. The wave form A voltage is applied to the inputs of a plurality of voltage ramp generators 18A-18N. Each generator 18 responds to the negative going transition or trailing edge of the wave form A voltage to provide a linearly increasing voltage during a first period of time from t.sub.o to t.sub.1 as shown in FIG. 2 and to provide a steady state voltage during a second period of time from t.sub.1 to t.sub.4. The output wave form of voltage for one of the ramp generators 18 is illustrated as waveform B in FIG. 2. The number of generators 18 which are used will depend on the range of inductance values for which the particular instrument is designed. Each of the generators 18 produces an output waveform having a different slope in the time period between t.sub.o to t.sub.1 as is more fully described hereinafter.

A range selector switch 20, which can be operated manually or automatically, connects the waveform B voltage from a selected one of the ramp generators 18 to the input of a voltage to current converter 22 which thus has an output current waveform of the same basic shape as waveform B. The output current from the voltage to current converter 22 is passed through the coil 10 under test to develop across the diode 14 a voltage having a waveform C as shown in FIG. 2. This voltage waveform C is applied to the inputs of a pair of selectively operated peak voltage detectors 24 and 26 having their respective outputs coupled to a difference amplifier 28. The amplifier 28 provides a d.c. output voltage equal to the difference between the two input voltages applied to its inputs and this output voltage is measured by a digital voltmeter circuit 30 which drives the digital readout or display 15.

The peak voltage detector 24 has a d.c. output voltage proportional to the maximum or peak voltage developed across the coil 10 during the period of time from t.sub.o to t.sub.1. Hence the control circuit 16 enables the peak detector 24 in synchronism with the negative transition of the waveform A and disables the peak detector 24 at time t.sub.1 when the voltage of waveform B reaches its maximum and steady state value. To this end, a control or gating voltage of waveform D as shown in FIG. 2 is applied to the peak detector 24 from the control circuit 16.

The peak detector 26 has a d.c. output voltage proportional to the voltage developed across the coil 10 during the second period from time t.sub.1 to time t.sub.4 while a steady state d.c. current is passed through the coil 10 under test. Hence the control circuit 16 enables the peak detector 26 during the time period from t.sub.2 to t.sub.3 as shown in FIG. 2 by applying a control or gating voltage of waveform E to the peak detector 26.

The peak detector and storage devices 24 and 26 store the peak voltages applied thereto for a period greater than the repetition period of the pulses of waveform A wherefor the voltage measured by the digital voltmeter 30 is proportional to the difference in the peak or maximum voltages across the coil 10 during the first and second periods. As explained hereinabove, this difference voltage is proportional to the inductance value of the coil 10 wherefor the digital display 15 displays the inductance value of the coil 10 while the switch 12 is held in the closed position.

As briefly mentioned above, the instrument of the present design displays on a three digit display the three most significant digits of the measured inductance values within a wide range of values. In accordance with this aspect of the design a first ramp generator 18A is used when inductance values between 0 .mu.H and 99.9 .mu.H are measured, a second ramp generator is used when inductance values between 1 .mu.H and 999 .mu.H are measured and so on. It may thus be seen that six ramp generators are required in an instrument for measuring inductance values in the range of 0 to 9.99 H.

In order to facilitate a better understanding of the present design and of the operation of the inductance measuring instrument of FIG. 1, assume that the coil under test has an inductance of 50 mH and a resistance of 20 ohms. For measuring inductance values in the range of 1 mH to 999 mH the generator 18 whose ramp portion has a slope of 10 volts/millisecond is selected and the ramp portion of the current wave passed through the coil 10 has a slope of 10 ma/m sec. This current has a steady state value between times t.sub.2 and t.sub.3 of 6 mA.

During the first period between t.sub.o and t.sub.1, the peak voltage developed across the coil 10 is therefore:



During the second period when the current passed through the coil 10 is constant, di/dt is zero wherefor the voltage developed across the coil 10 is:



Since the voltage output of the difference amplifier is



The readout or display 15 will thus display the digits 5-0-0. The display is graduated and decimalized to show that the actual inductance value is 50.0 m.h.

If, for example, a coil 10 having an inductance of 525 .mu.H and a resistance of 2 ohms were to be tested, the ramp generator 18 whose ramp portion has a slope of one amp/msec would be selected. Hence the peak voltage detected during the ramp portion of the applied current would be:



The readout 15 will thus display the digits 5-2-5 which is graduated to read 525 .mu.H or 0.525 mH.


Figure 3 : Is a schematic diagram for the direct reading inductance meter
Is a schematic diagram of an inductance measuring circuit constituting a preferred embodiment of the design. <br>for the direct reading inductance meter

View larger image here.


Referring now to FIG. 3 wherein is shown the schematic diagram of an inductance meter embodying several novel features of this design, the same reference characters as used in FIG. 1 are used to denote the corresponding function blocks in FIG. 3. The ramp voltage generator circuit 18 shown in detail in FIG. 3 is for measuring inductance values in the range of from one to 100 MH and thus provides a ramp portion from t.sub.o to t.sub.1 having a slope of 10 amps/sec.

The control circuit 16 is energized from a standard 60 Hz power line and shapes the line frequency power to form the three control signals shown by waveforms A, D and E. The line voltage which is applied between input terminal 32 and ground is coupled by a transistor TR1 to both inputs of a plurality of NAND gates 34 to provide a voltage having the shape of waveform A. This voltage is coupled via a diode D1 to the inputs of the plurality of ramp voltage generators 18.

When the voltage applied to the input of the generator 18 goes low, capacitor Co is permitted to charge from a 20 V power supply bus. The transistor TR2 controls the charging current whereby the voltage across the capacitor Co increases linearly until the voltage at the collector of the transistor TR2 reaches 12 volts and a Zener diode 36 becomes conductive to prevent and further charging of the capacitor Co. The adjustable resistor 38 connected between the capacitor Co and the -3 V power supply terminal is used to calibrate the instrument for each inductance range by adjusting the slope of the voltage across the capacitor Co during charging.

When the Zener diode 36 conducts a positive voltage is applied to the positive input of an amplifier A1 causing its output to go high. The output of the amplifier A1 is applied to one input of a NOR gate 40, the other input having the voltage shown in waveform D applied to it from the control 16. Hence when the Zener diode 38 conducts, the control voltage applied to the peak detector 24 goes low.

The signal which is illustrated in waveform E and which is used to control the peak detector 26 is also derived from the 60 Hz power line voltage by the control circuit 16. As shown, the power line voltage is applied to the base of a transistor TR3 which drives a pair of cascaded NAND gates 41 thereby to provide the positive voltage pulse during the period from t.sub.2 to t.sub.3.

The waveform B voltage which appears at the collector of the transistor TR2 is transmitted by a diode D2 and the range selector switch 20 to the emitter of the transistor TR4 in the voltage to current converter 22. The collector of the transistor TR4 is connected to the junction between the switch S1 and the diode 14 and also to the positive input terminal of an amplifier A2. The voltage at the output of the amplifier A2 is equal or proportional to the voltage across the coil 10 under test when the switch S1 is closed and this voltage is applied to the input terminals of a pair of solid state switches 42 and 44 respectively provided in the peak voltage detectors 24 and 26. A capacitor C1 is connected between the ground and the output of the switch 42 and a capacitor C2 is connected between ground and the output of the switch 44. Therefore, while the control voltage to the switch 42 from the NOR gate 40 is high, the capacitor C1 charges up to the voltage across the coil 10, and while the control voltage to the switch 44 is high the capacitor C2 charges up to the voltage across the coil 10.

A pair of buffer amplifiers A3 and A4 respectively couple the voltage across the capacitors C1 and C2 to the inputs of the difference amplifier 28 which includes the amplifier A5 whose output is connected to a conventional digital voltmeter circuit which drives the digital readout. The voltage at the output of the amplifier A5 is, as explained hereinabove, proportional to the inductance value of the coil 10 under test, wherefor the three digit number displayed by the digital readout is the inductance value of the coil 10.

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