PCF8574: Is this the Simplest I/O Expander Ever? How does this device work when it has no Internal Control Registers? Yet it allows a processor to Read from, or Write to each pin very easily. Find out its Secret Here.

The PCF8574:

  • It is an I2C port expander with 8 I/O pins.

  • I/O is quasi bidirectional!

  • It has a maximum I2C speed of 100kHz - there are faster drop in replacements.

  • Comes in a 16 pin DIP package (and others).

  • Up to 64 I/O pins on a single I2C bus.

  • Up to 128 I/O pins if you use PCF8574A chips as well.

  • It has no control registers and is therefore faster and simpler to program.

The PCF8594 is quite unusual in that it has No Internal Control Registers! All you have is an internal state machine that operates the I2C interface, and all you can do is write an I2C address (with R/W bit) and then read data from, or write data to the chip.

The interesting thing is that the pins are bidirectional without using any register bit in the chip to set the direction. The datasheet indicates that all pins are quasi-bidirectional and that they can be used as either inputs or outputs as desired.

PCF8574 pinout

pcf8574 pinout

PCF8574 datasheet

Download the datasheet here.

PCF8574 Specification

Voltage Supply (Vs)
 2V5 ~ 6V0
Abs. Max VDD
-0V5 ~ 7V0
Abs. Max IOL
Abs. Max IOH -4mA
I2C rate
100kHz (MAX) [1]
IOH High level output (VO=GND) (min,max)
30uA, 300uA
IOH High level output current transient in ACK
-1mA [*]
IOL Low level output current (min, typ)
10mA, 25mA [*]
Current through VCC or GND(recommended,max)
Standby current
I2C Addresses (h/w selected = 8off)
0x20 ~ 0x27 [2]
Operating temperature
-40°C ~ 85°C
    [1] You can buy a drop in replacement for 400kHz clock capability : PCA8574.
    [2] Using a additional chip type PCF8574A, you can double the number of chips on the I2C bus as its address starts from 0x38.

[*] The asymmetrical pin operation is intentional and intended for driving high current when pulling low.

Note: For 2x the amount of I/O pins add PCF8574A (Uses different Addresses).

Block diagram of the PCF8597

pcf8574 block diagram

Warning: There are no internal pullups you have to supply your own resistors.

PCF8574 pin block diagram

pcf8574 pin block diagram

How a PCF8574 I/O Pin Works:

There are two quotes from the datasheet that are relevant:

    "At power on, the I/Os are high. In this mode, only a current source to VCC is active"

    "The I/Os should be high before being used as inputs."

Referring to the PCF8574 pin block diagram.

When the output d-type (the top one) is set high (H), the signal goes through an inverter and the signal goes low (L) and on to the gate of the two output MOSFETs so the top MOSFET (p-type) is on, while the other is off (n-type). So the top MOSFET with its 100uA current source is connected to the output pin.

The data sheet indicates the output (into a grounded load) is nominally 100uA source current but can vary from 30uA to 300uA. It can not supply huge current when the output is set high and can not supply more (Abs max are overload values).

Note that the high current MOSFET (the strong pullup, not the 100uA current source) is enabled (NAND Gate = L) when the output register is high (OUTPUT =1) AND the write pulse is high (WRITE). So, for reading it is not active.

This diagram from the datasheet shows simplified operation:PCF8574 quasi bidirectional pin operation

The top MOSFET (in the pin block diagram) is the accelerator pull-up and its only purpose is to put more current into a load when the PCF8574 output is high (and only during half of the ACK duration; see the 'write' timing diagram in the datasheet). This gives a faster rising edge into a capacitive load - for the rest of the time (during output) the 100uA pull-up source takes over.

The reason the accelerator pull-up MOSFET exists is to compensate for the weak current source that is needed to allow a pin to be an input.

In write mode the current drive is asymmetric and without the accelerator pulling down gives 10mA drive, but pulling up gives 100uA drive. Without the accelerator, for any load with any capacitance, the voltage will fall quickly, but rise slowly. The accelerator compensates by driving high current for a short time (during half ACK time) to give a burst of current that forces the output to rise quickly.

Reading a pin as Input

To read a pin the output d-type must be set high enabling the weak 100uA pullup but more importantly disabling the lower output MOSFET.

Input High

When the input voltage at the pin is high no current flows and the PCF8574 reads logic '1'.

Input Low

When the input voltage at the pin is low a current of 100uA must be sunk by the external circuit to pull down the voltage at the pin. So it must pull harder than 100uA (300uA max) for the PCF8574 to read a logic '0'.

Writing a pin as Output

Output High

When writing a logic '1', as mentioned the accelerator pullup operates for half the ACK pulse then the 100uA weak pullup stays active. When driving an output high you can not sink much current (30uA ~ 300uA, nominally 100uA) if you take more current then the output voltage will be lower possibly causing an invalid logic level.

If you drive into normal CMOS inputs then hardly any current is drawn, so there is no problem but driving into other high current loads will cause problems i.e. don't drive an LED referenced to Ground.

Output Low

There is no current sink limit for the n-type MOSFET so you can sink current through it (10mA ~ 25mA). If you want to drive 8 LEDs then then the recommended max package current is 80mA. So driving each at 10mA is ideal.

TIP: Drive LEDs referenced to Vcc as higher output current is available.

PCF8574 Interrupts

Any change between the last read pin value (stored in lower d-type) and the current input pin value generates an interrupt.

Warning: Interrupt state is not stored - transient interrupts may be missed.

Because this is a simple device no interrupt signal is stored. It is simply generated by an XOR gate using the d-type 'read' value and the pin value (pin block diagram - lower XOR gate). Consequently interrupt states must be long lived, and any short term ones will be missed.

Note: There are no interrupt masks and no interrupt stored state (as you get with the MCP32017 - with that device you can read the interrupt flag register to find out which interrupt triggered the interrupt signal - at the time it was triggered).

You could get the situation where an interrupt is triggered to the processor e.g. it detects a falling edge but when it gets around to reading the interrupt, the condition that caused the interrupt has gone. In that case you won't know why the interrupt triggered and there's no way to find out!

PCF8574 I2C Speed

Although the maximum speed of the PCF8574 is defined in the specifications as 100kHz. There is reference to 400kHz operation - in Application Curves Section 9.2.3 where standard and fast mode curves are shown in graph R pullup vs Bus Capacitance.

The question is why has 400kHz operation been removed from the datasheet. It is probably due to internal capacitance variation  in production.

You can buy different versions of this chip that are 400kHz capable: PCA8574. The PCA9674 is capable of 1MHz operation. These are drop in replacements.


It has an unusually simple architecture but it works, and it can be a cheaper alternative.

Less Complicated so Less Code Needed

One interesting point about the PCF8574 is that because it is so basic, having no internal registers (other than input and output d-types, and the main shift register), programming of the device is extremely simple. It means you don't have to control it with lots of setup code, and every interaction with the device is simple. All you need is an I2C library - the "wire library".

If you need to save programming memory in your microcontroller, this device will use less code than an equivalent device e.g. MCP23017. So overall, the amount of code used to control it will be less than a more complex chip. However I expect it will not make huge code savings.

Quasi bi-directional

Since there are no control registers (except bit stores for output and input), the only control is the output one - set it high to allow input. It sounds wrong but in this state the low side n-type MOSFET is off and the high side p-type MOSFET is on. The key is the the high side p-type MOSFET has limiting circuit to give only a weak current output - that can be overridden by external circuitry.

When reading a pin, external circuits must drive enough current to overcome the weak internal current source.

Current Output

The output drive is asymmetric to allow the quasi bi-directional pin operation. When driving low, current can be sunk (up to 25mA) when driving high current can only be sourced to 100uA. So arrange your circuit to drive LEDs when the output is set low.


Have your say about what you just read! Leave me a comment in the box below.

Don’t see the comments box? Log in to your Facebook account, give Facebook consent, then return to this page and refresh it.

Privacy Policy | Contact | About Me

Site Map | Terms of Use