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MCP4728


The MCP4728 is an analogue DAC giving you four buffered output voltages controlled from an I2C serial interface. Each DAC can output a proportion of the input reference voltage. Since it's a 12bit device its resolution is Vref/4096. So you can choose very fine steps dividing down from the reference.


MCP4728 Breakout Board

Each DAC output has an associated EEPROM memory so the device can power up immediately to a previously store output voltage.

This chip automatically updates the EEPROM on write, and restores the outputs on reset. You don't really have to do anything to get this functionality other than program the DAC outputs the first time!

One unique feature is that you can use LDACn to update all outputs at the same time.

This discussion compares the MCP4728 to its cousins the MCP4726 and MCP4726 since the same underlying hardware is used throughout these devices. As a consequence you get similar analogue performance (including non linear operation at the lower and upper code areas).

The basic differences are outlined below:

  • MCP4725
    • Memory capable single analogue output.
    • Limited Addressing (Manufacturer programmed except 0x60, 0x61).

  • MCP4726
    •  Memory capable single output but with reference input pin
    •  Very Limited Addressing (Manufacturer programmed except 0x60).

  • MCP4728
    • Memory capable Quad analogue output with internal reference.
    • Has internal 2% accurate voltage reference or VDD as the reference. 
    • Extremely good Address range (User programmed in EEPROM - can also be manufacturer programmed) - Eight addresses are available 0x60..0x67.
    • Synchronous update - All outputs can be synchronously changed.

The MCP4728 was probably made to overcome some of the shortcomings of using several individual SOT-23-6 devices when you know you are going to need a few DAC outputs.

I2C Addresses

Problems with MCP4725 and MCP4726

The problem is I2C addressing - each of either MCP4725 / MCP4726 must be programmed by the manufacturer if you want more than 2 of MCP4725, or more than 1 of MCP4726, on the same I2C bus.

Solution with MCP4728

In fact the MSOP (10 pin SMD) does not bring out the address pins either! There are no A0, A1 and A2 physical pins. It uses a more useful scheme by allowing the internal EEPROM to define these values. However the method to program these addresses is a little bit of a pain - but it is doable!

The EEPROM address defaults to zero, so if you only need four DAC outputs, you don't need to program anything just use I2C address 0x60.

With the MCP4728 you get four DAC outputs for every chip, giving you 32 possible DAC outputs on a single I2C bus.

TIP: Power down unused DAC chains to save current used.

Voltage Reference

The MCP4728 can either use a dedicated internal voltage reference, or the VDD supply pin. The MCP4725 can only use VDD.

The internal reference can be set to 2.048V or 4.096V. The latter value is useful since the 12bit DAC outputs Vref/4096 meaning you get 1mV per LSB.

Note: The MCP4728 can also use VDD as the reference pin so you could feed in an accurate reference to that pin (this is the same as the MCP4725).

MCP4728 Pinout

The chip comes in a small, 10 pin,MSOP (Medium Square Outline Package) - an SMD device.

MCP2748 pinout
                                        [Source: Datasheet]

MCP4728 Specification

  Parameter
MCP4728
  Voltage Supply (Vs)
2V7 ~ 5V5
  Abs. Max VDD
-0V3 ~ 6V5
  Interface
I2C
  I2C rate
100kHz, 400kHz, 3.4MHz
  Resolution
12 bit
  Power Down I (VDD=2V7~5V5 - typ, max)
45uA, 60uA (internal ref)
  No load current (typ, max) [4]
800uA, 1400uA
  Short circuit (Vout=GND) (typ, max)
15mA, 24m
  Offset error (typ,max)
5, 20mV
  Offset error drift (-45~25, 25~85ºC, typ) ±0.16ppm, ±0.44ppm
  INL (typ,max) LSB
±2, ±13 [3]
  DNL (min,typ,max) LSB
-0.75, ±0.2, ±0.75 [2,3]
  Gain error (min, typ, max) %FSR -1.25, 0.4, 1.25
  Gain error drift
-3 ppm/ºC
  Phase margin
66º
  Capacitive load stability (5k load)
1000pF
  Slew rate
0.55V/us
  Output voltage settling time
6us
  I2C Addresses (h/w selected = 8off)
0x60, 0x67 [1]
  Operating temperature
-40°C ~ 125°C
  Internal Voltage Reference
2.048V±2%
    [1] For more devices on a single I2C bus order pre-programmed devices.
    [2] A number below 1 LSB means no codes are missed.
    [3] Code Range 100 to 4000 (see Accuracy).  
    [4] Can be reduced if unused DACs are shut down.

MCP4728 Specification vs MCP4725

  Parameter
MCP4725
MCP4728
  Voltage Supply (Vs)
2V7 ~ 5V5 Same
  Abs. Max VDD
-0V3 ~ 6V5
Same
  Interface
I2C
Same
  I2C rate(kHz,kHz,MHz)
100,400,3.4Same
  Resolution
12 bitSame
  Power Down I (VDD=5V5 -typ,max)
0.06uA, 2uA
45uA, 60uA
  No load current (typ, max) [4] 210uA, 400uA
800uA, 1400uA
  Short circuit (Vo=0V) (min,typ,max)
7, 15, 24mA
Same (min n/a)
  Offset error (typ,max)
±0.02,0.75 %FSR 5, 20mV
  Offset error drift (-45~25, 25~85ºC) ±1ppm, ±2ppmSame
  INL (typ,max) LSB
±2, ±14.5 [3]
±2, ±13 [3]
  DNL (min,typ,max) LSB[2,3] -0.75,±0.2,±0.75 
Same
  Gain error (min, typ, max) %FSR -2, -0.1, 2
-1.25, 0.4, 1.25
  Gain error drift
-3 ppm/ºC
Same
  Phase margin
66º Same
  Capacitive load stability (5k load)
1000pF100pF
  Slew rate
0.55V/us
Same
  Output voltage settling time
6us
Same
  I2C Addresses (h/w selected = 8off)
0x60, 0x61 [1]0x60..0x67
  Operating temperature
-40°C ~ 125°C
Same
  Internal Voltage Reference N/A
2.048V±2%
    [1] For more devices on a single I2C bus order pre-programmed device
    [2] A number below 1 LSB means no codes are missed.
    [3] Code Range 100 to 4000 (see Accuracy)
   
[4] Can be reduced if unused DACs are shut down.

MCP4725/6, MCP7428 Block Diagrams

The MCP728 has evolved from designs of the simplest DAC buffer (MCP4725), through the (MCP4726), with external reference pin, to the MCP4728 providing an internal voltage reference, selectable gain opamp, and multiple DAC outputs.

The MCP4728 also has a superior addressing scheme.

You can see this evolution in the block diagrams below:

MCP4725 Block Diagram

MCp4725 Block Diagram
                                [Source: Datasheet]

MCP4726 Block Diagram

MCp4726 Block Diagram
        [Source: Datasheet]

MCP4728 Block Diagram

MPC4728 block diagram
             [Source: Datasheet]

MCP4728 Datasheet

Download the MCP4728 datasheet here.

I2C Address

MCP4728 Address mapping

The lower three bits of the address consist of the three digital inputs A2, A1, A0 while the upper bits are fixed at 1100xxx.

Unlike the both the MCP4725 and MCP4726 A0, A1 and A2 are fully programmable with their state stored into internal EEPROM. There is an option for the manufacturer to program these bits for you which would be useful on a large production run.

The the last bit( LSB ' 'L), sent following the address bits, is ignored as it is the read write bit (R/Wn). Therefore the addresses available are:

        0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67

For use in a simple system you will only need a single address 0x60 since that device will provide 4 DAC outputs.

Output Update

There are new storage registers for each channel in the MCP4728:

  • An input register per channel.
  • An output register per channel.

You can send data to the input register using I2C data transfers but the output won't update until the data is transferred from input to output.

There are two signals that control updating the output.

  • LDACn - Affects all 4 channels at the same time.
  • UDACn - Affects only the updated channel (after Tx of I2C data).

The signals LDACn and UDACn have been added as a control inputs. LDACn is input from a pin while UDACn is an internal control bit associated with each channel update (I2C packet).

Both are used to update the analogue output, but LDACn is also used for reading and writing the internal address bits stored in EEPROM.

You can see these signals and registers in the block diagram below:

MPC4728 block diagram
             [Source: Datasheet]

Default single channel update

In normal use you will probably want to keep LDACn high and set the UDACn bit low in each I2C packed data transmission.

In this case a single DAC output is updated at the falling edge of the last ACK bit in the I2C data transfer sequence. So when you send I2C data for a channel, the DAC output voltage is updated at the end of the I2C transmission.

The EEPROM is also written after the output updates.

Synchronous all channel update

If your application requires that all analogue outputs must change at the same time very quickly then use the LDACn signal.

Hardware method

Set UDACn bit high (inactive) set LDACn high (inactive), send the I2C data for each channel (which loads the input register for each channel) using the command:

    "Multi-Write for DAC Input Registers"
    (Datasheet Table 5-1 Write Command Types) .

After the last channel data is sent then pull LDACn low. This transfers all input register data to output registers so the analogue outputs all change at the same time.

Software method

A software method (for the same action) is to send the I2C General Call Software Update command. This assumes LDACn is held high (inactive).

EEPROM updates

Most of the commands (See the datasheet) perform an EEPROM write after you have sent the DAC data so there's no action to take when you want to save the current DAC states. Similarly data is recovered from the EEPROM on reset or power up so saving and restoring data is built into the MCP4728 operation.

EEPROM writes take can take up to 50 milliseconds (20ms typ) and no other command can be executed, so you have to read the RDY/BSYn pin (or the register bit) to check if you can continue.

Warning: Most commands update the EEPROM taking 20ms (typ).

The only commands that do not write to the EEPROM are:

  • "Fast write for DAC input registers",  and
  • "Multi-Write for DAC Input Registers" 

    See the Datasheet: "Table 5-1 Write Command Types" for the above commands.

Warning: Don't continuously write to the EEPROM as it has a lifetime.

Fast updates

In some applications you may want to get the maximum refresh rate. To do this you need the fastest command (the shortest I2C data stream). This will be one which only writes to a single register, and one that does not perform an EEPROM write.

The command is:

    "Fast write for DAC input registers" 

    See the Datasheet: "Table 5-1 Write Command Types" for the above command.

This command requires the use of the LDACn signal to upload the input register to the output register i.e. to get the analogue voltage output at the pin.

Warning: For this 'fast' command you must use the LDACn control pin.

If you want to update all outputs at the fastest rate then you have to avoid writing to the EEPROM. You can use this command:

  • "Multi-Write for DAC Input Registers" 

    See the Datasheet: "Table 5-1 Write Command Types" for the above commands.

This command also requires that you use the LDACn control pin to update the output.

Warning: For this 'fast' command you must use the LDACn control pin.

Speed or pin saving (LDACn)

LDACn

There are four issues:

  1. Programming internal address bits (Needs LDACn).
  2. Fastest Update Speed (Needs LDACn).
  3. Synchronous updates (Needs LDACn).
  4. Saving microcontroller pins (Does not need LDACn).

Programming Address bits

Imagine you have 8 MCP4728 devices on your board, and initially use LDACn to update the internal address bits for each device. That means you need to have 8 individual control signals from the microcontroller to do this task.

If you don't want to use up 8 microcontroller pins for LDACn control then you decide to tie LDACn high and get the manufacturer to program each MCP4728 (so you don't have to do it on the board). This saves you 8 control lines.

LDACn Address bit timing

If you decide you want LDACn because you want fast synchronous updates then you'll probably want to update the MCP4728 internal addresses.

To program the address bits the LDACn signal must be controlled relative to the output I2C data packet clock and the I2C data rate for this function must be no more than 400kHz (Section 5.4.4 of the datasheet), Specifically:

"The LDACn pin needs a logic transition from "High" to "low" during the negative pulse of the 8th clock of the second byte, and stays "Low" until the end of the third byte."

Since it is difficult for an Arduino Uno to time this accurately (you have to time a signal from the start of the I2C data packet), you should lower the I2C clock rate.

Solution using I2C rate lower than 400k

Thinking about the problem - you don't have to use the fastest rate to setup the addresses - after all you are only going to do this once - after that the addresses are stored in internal EEPROM permanently.

Either lower the I2C rate using the I2C command SetClock() or use a bit-banged output. SetClock() can only accept a few frequencies and may not allow 10kHz.

So the solution is to take over the I2C pins and use them as normal digital I/O and bit-bang the signals but also control LDACn at the same time and at the right time. One bit-bang library that you could adapt is SoftWire.

Fastest update and Synchronous Updates

If you don't have LDACn control then there are three things you can not do:

  1. Fast updates.
  2. Fast Synchronous updates.
  3. Update internal Address bits.

You can't do fastest updates as LDACn is used in the command: "Fast write for DAC input registers" (Datasheet Table 5-1 Write Command Types).

LDACn is also used to synchronously update analogue outputs - the fastest method. There is a slower software method.

Saving Microcontroller pins

Remove LDACn control connections.

If your design is ok with without LDACn controls (see above) then you have just saved 8 control lines in a design.

Remove RDY/BSYn status connections

The other pin you may want to monitor with a microcontroller input is the  RDY/BSYn pin. This indicates whether the MCP4728 is busy - when an EEPROM write is in progress. You may want to add this pin as an interrupt to the microcontroller to save polling time, but again you could have up to 8 devices.

An alternative is to read the RDY/BSYn signal from one of the registers using an I2C query, and save 8 more microcontroller pins.

Conclusions

The MCP4728 is useful if you need more than a few DAC outputs as it has 4 in one chip. With the built in voltage reference you can accurately control the output voltage independently of the power supply.

DACs per unit

The MCP4728 has more DACs per chip, so for more than a couple of DAC outputs it is easier to use the MCP4728. This because you won't need to buy manufacturer pre-programmed chips (I2C address programmed).

Power Consumption

You can save a lot of power-down current using MCP4725 or MCP4726 compared to the MCP4728! (60nA compared to 45uA).

However note that the the maximum current in the powered-up spec for four MCP4725/6s is a bit higher than the MCP4728 (410*4 = 1640uA compared to 1400uA).

State
MCP4728
MCP4725 and MCP4726:
Powered up
800uA ~ 1400uA 210uA ~ 410uA, same
Powered Down
45uA ~ 60uA 60nA ~ 2uA, 90nA ~ 2uA

Note: Shut down unused DAC chains to save current.

Voltage Reference

The MCP4728 is more convenient with its built in voltage reference.

Saving Microcontroller Pins

If you are not interested in speed, then you can use the same number of control connections as used in the MCP4725 and MCP4726. Basically set inactive LDACn control pin and don't read the RDY/BSYn status pin. This is possible since there are alternative register controlled internal functions in the MCP4728.

Programming Address Bits

This requires mucking about with an exactly timed signal relative to the I2C output; It is just easier to switch to slow bit-banged operation to get this done.

Speed

This chip has the same underlying hardware as the MCP4725 and will have similar performance (see MCP4725 sine waveforms). It will, however, be slower than the MCP4725 as there is more data to transmit to update 4 registers (it may be that you can stop in the middle - not tested).

Calculations show that even with I2C at 3.4MHz the maximum update rate is still slow (see MCP4725 which uses the same DAC hardware internally). An alternative is MCP4922 but even that is still slow. A parallel DAC will be suitable for fast updates e.g. DAC08.

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